1. Field of the Invention
The present invention relates to BiCMOS (bipolar complementary metal oxide semiconductor) devices, and more particularly to a method of fabricating a bipolar device having a deep subcollector region which is formed by a high-energy/high-dose implant step using a dielectric hardmask which is not adversely effected by the high-energy/high-dose implant.
2. Background of the Invention
In the fabrication of prior art bipolar devices, the subcollector regions are typically formed by first implanting a shallow As (or other like dopant ion) implant into a predetermined portion of a semiconductor substrate. An oxide is then thermally grown over the shallow implant region so as to consume end-of-range (EOR) defects that are formed during shallow implant followed by a high-temperature anneal to diffuse the As or other like dopant ion deeper into the substrate. A conventional wet etch process is then performed to remove the oxide and an epitaxial layer is grown over the implant region.
Although capable of forming deep, heavily doped, subcollector regions in the substrate, the prior art process mentioned above is costly due to the extended oxidation time typically needed to eliminate EOR defects and due to the epitaxial growth process.
In addition to the above prior art process, deep subcollector regions can be formed by high-energy implantation of an n-type dopant such as phosphorus (P), which is masked utilizing a thick resist. The use of a thick resist to form a deep subcollector region has the following limitations associated therewith:
(i) Prior art thick resists have sloped sidewalls in the range of from about 80xc2x0 to about 85xc2x0 prior to implantation. After high-energy implants using P or other like dopant ion at an energy of about 600 keV to about 3 MeV using doses in the range of about 1E14 to about 4E15 atoms/cm2, the sidewalls of prior art resists degrade significantly to about 65xc2x0 to about 70xc2x0. This degradation in sidewall slope limits the pitch of the device due to P or other like dopant ion getting thru the foot of the resist near the edge of the device. This causes an increased subcollector to subcollector ground rule to contain the implant, which consequently enlarges device size and reduces transistor packing density.
(ii) Prior art photoresist thicknesses decrease with increasing implant dose which limits the total allowable dose. In addition, the higher the implant energy, the faster the resists erodes.
(iii) Prior art resists may explode and peel up from the wafer during the implantation process unless highly specialized UV hardened photoresists are employed. This makes high-energy implants that are greater than about 1E15, 1 MeV unfeasible.
In view of the above-mentioned drawbacks in forming deep subcollector regions utilizing prior art processes, there is a continued need for developing a new and improved method of forming deep subcollector regions which overcome the prior art problems.
One object of the present invention is to provide a cost efficient method for forming deep subcollector regions which avoids the use of extended oxidation times and the need for growing an epitaxial layer after implantation.
A further object of the present invention is to provide a method of forming deep subcollector regions which does not require the use of a conventional thick resist during the implantation process, yet still provides a cost advantage over conventional diffused subcollectors.
A yet further object of the present invention is to provide a method of forming deep subcollector regions using a higher energy/higher dose implant than heretofore possible with prior art processes.
An even further object of the present invention is to provide a method of forming deep subcollector regions wherein the subcollector to subcollector ground rule to contain the implant is not significantly increased and hence dense transistor packing is preserved.
These and other objects and advantages are achieved in the present invention by utilizing a method wherein a hard dielectric mask is employed during a high-energy/high-dose implantation step. Specifically, the method of the present invention comprises the steps of:
(a) lithographically forming a first patterned layer comprising a thick dielectric material on a surface of a material stack formed on a semiconductor substrate, said first patterned layer including at least one opening therein and said semiconductor substrate having at least an alignment area;
(b) performing a high-energy/high-dose implant through said at least one opening and said material stack so as to form at least one deep subcollector region in said semiconductor substrate;
(c) lithographically forming a second patterned layer (photoresist or dielectric) predominately outside the first patterned layer in said alignment area; and
(d) etching through said material stack in said alignment area to form alignment marks in the underlying semiconductor substrate using said first patterned layer as an alignment mark mask.
As stated above, the above-mentioned method forms deep subcollector regions in portions of a semiconductor substrate. Additionally, the inventive method forms alignment marks, i.e., photo registration marks, in the substrate that are self-aligned with the edges of the deep subcollector.